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14.2. Accessing USB FIFO Space
shows an expanded view of the FIFO space and user XRAM. FIFO space is normally accessed via USB
FIFO registers; see Section “21.5. FIFO Management” on page 181 for more information on accessing
these FIFOs. The MOVX instruction should not be used to load or modify USB data in the FIFO space.
Unused areas of the USB FIFO space may be used as general purpose XRAM if necessary. The FIFO
block operates on the USB clock domain; thus the USB clock must be active when accessing FIFO space.
Note that the number of SYSCLK cycles required by the MOVX instruction is increased when accessing
USB FIFO space.
To access the FIFO RAM directly using MOVX instructions, the following conditions must be met: (1) the
USBFAE bit in register EMI0CF must be set to 1, and (2) the USB clock must be greater than or equal to
twice the SYSCLK (USBCLK > 2 x SYSCLK). When this bit is set, the USB FIFO space is mapped into
XRAM space at addresses 0x0400 to 0x07FF. The normal XRAM (on-chip or external) at the same
addresses cannot be accessed when the USBFAE bit is set to 1.
Important Note : The USB clock must be active when accessing FIFO space.
0xFFFF
On/Off-Chip XRAM
0x0800
0x07FF
Endpoint0
0x07C0
(64 bytes)
0x07BF
Endpoint1
0x0740
(128 bytes)
0x073F
Endpoint2
(256 bytes)
0x0640
0x063F
0x0440
0x043F
Endpoint3
(512 bytes)
Free
USB FIFO Space
(USB Clock Domain)
0x0400
(64 bytes)
0x03FF
On/Off-Chip XRAM
0x0000
Figure 14.1. USB FIFO Space and XRAM Memory Map with USBFAE set to ‘1’
94
Rev. 1.4
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